Tiwei Wei;Jian Cai;Qian Wang;Yang Hu;Lu Wang;Ziyu Liu;Zijian Wu;

• 1:the Institute of Microelectronics
• 2:Tsinghua University
• 3:the Institute of Microelectronics and Tsinghua National Laboratory for Information Science and Technology
• 4:Tsinghua University

摘要(Abstract)：

The barrier/seed layer is a key issue in Through Silicon Via(TSV) technology for 3-D integration.Sputtering is an important deposition method for via metallization in semiconductor process. However,due to the limitation of sputtering and a "scallop" profile inside vias,poor step coverage of the barrier/seed layer always occurs in the via metallization process. In this paper,the effects of several sputter parameters(DC power,Ar pressure,deposition time,and substrate temperature) on thin film coverage for TSV applications are investigated.Robust TSVs with aspect ratio 5 1 were obtained with optimized magnetron sputter parameters. In addition,the influences of different sputter parameters are compared and the conclusion could be used as a guideline to select appropriate parameter sets.

关键词(KeyWords)：

Abstract:

Keywords:

基金项目(Foundation): supported by the National Natural Science Foundation of China (No. 61274111);; he National Science & Technology Major Project of China (No. 2011ZX02709)

作者(Authors): Tiwei Wei;Jian Cai;Qian Wang;Yang Hu;Lu Wang;Ziyu Liu;Zijian Wu;

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